TSMC and ASML launch push for 12-inch EUV photomasks, targeting a 2031 pilot line
TSMC and ASML said on 8 September 2026 they will lead a move to 12-inch EUV photomasks, with a pilot line by 2031 and High NA production use from 2033.
By Emre AlemdarPublished
Tech AI LatestTSMC and ASML announced on 8 September 2026 an industry initiative to move extreme ultraviolet lithography from today's 6-inch photomasks to 12-inch masks. They target a 12-inch mask pilot line by 2031 and 12-inch High NA systems in advanced-node production by 2033. TSMC also said it plans to use High NA EUV in high-volume manufacturing from 2030, starting with current 6-inch masks, as AI chip designs need more High NA layers.
Key facts
- Announced: 8 September 2026 (TSMC and ASML joint release)
- Goal: transition EUV photomasks from 6-inch to 12-inch
- Targets: 12-inch mask pilot line by 2031; 12-inch High NA lithography systems in advanced-node production by 2033
- TSMC plans High NA EUV in high-volume manufacturing for advanced nodes starting in 2030, on 6-inch masks first
- Claimed benefits: higher fab productivity, lower chipmaking cost, no stitching constraints
- Other participating companies: not named in the release
What TSMC and ASML announced
TSMC and ASML said on 8 September 2026 that they had formed a collaborative industry initiative the day before, ahead of the SPIE BACUS photomask conference in Monterey, California. The aim is to move extreme ultraviolet (EUV) lithography from the current 6-inch photomasks to 12-inch masks. The release was issued jointly from Hsinchu, Taiwan, and Veldhoven, the Netherlands.
The release sets two targets: a 12-inch mask pilot line by 2031, and 12-inch High NA lithography systems entering advanced-node production by 2033. Until then, High NA EUV will be adopted for production using today's 6-inch masks. The companies say the larger masks should raise fab productivity, lower chipmaking costs and remove stitching constraints.
Why AI chips are part of the story
TSMC says it plans to use ASML's High NA technology in high-volume manufacturing for advanced nodes starting in 2030. It expects the number of chip layers that need High NA EUV to rise, mainly because of the transistor architectures required for AI applications. Stitching means building one large chip pattern from more than one exposure. Removing that step matters most for the large accelerator dies used in AI data centres.
ASML president and CEO Christophe Fouquet is quoted saying he expects High NA adoption "to increase progressively along the device scaling roadmap", first with 6-inch masks and then with 12-inch masks. TSMC chairman and CEO C.C. Wei is quoted saying the partners "unlock possibilities that no single company could achieve alone".
What changed for chipmakers
Changing the mask size touches mask blank makers, inspection tools, mask writers and scanners at once. Announcing targets five to seven years ahead gives suppliers a timeline to plan against. The initiative is a planning commitment rather than a product launch, and no investment figure is attached to it. The release says High NA adopters and other major suppliers attended and expressed interest in joining, but it does not name them. For buyers of AI chips, the near-term effect is none: the dates fall after the Vera Rubin generation that NVIDIA is shipping now, covered in our supply chain story.
What to watch next
The next signals are named participants from the mask, materials and equipment supply chain, and any ASML product roadmap that includes a 12-inch-capable scanner. TSMC's 2030 High NA ramp is the first dated step. The cost of the transition, the first suppliers of 12-inch mask blanks and whether existing High NA scanners can be adapted are not stated in the announcement. Further manufacturing stories are collected under AI Chips & Infrastructure.
What changed
| Before | EUV lithography uses 6-inch photomasks, and TSMC had not given a High NA production date |
|---|---|
| After | TSMC and ASML target a 12-inch mask pilot line by 2031 and 12-inch High NA production by 2033; TSMC plans High NA volume use from 2030 |
| Who it affects | Mask, materials and lithography suppliers, and designers of very large AI accelerator dies |
Questions people ask
- What did TSMC and ASML announce about photomasks?
- An industry initiative, formed on 7 September 2026, to move EUV lithography from 6-inch to 12-inch photomasks, with a pilot line targeted by 2031.
- When will TSMC use High NA EUV?
- TSMC plans to use ASML's High NA technology in high-volume manufacturing for advanced nodes starting in 2030, first with current 6-inch masks.
- Why do larger photomasks matter for AI chips?
- The companies say 12-inch masks remove stitching constraints and raise productivity. TSMC expects more High NA layers mainly because of transistor architectures needed for AI applications.
Sources
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